|
Which is the type of cache memory ___
|
|
0
|
385
|
July 27, 2021
|
|
How many type of cache memory ___
|
|
0
|
271
|
July 27, 2021
|
|
The cache usually gets its data from the ___ whenever the instruction or data is required by the CPU
|
|
0
|
2937
|
July 27, 2021
|
|
Which is the small amount of high‐speed memory used to work directly with the ___
|
|
0
|
306
|
July 27, 2021
|
|
___ is usually the first level of memory access by the microprocessor:
|
|
0
|
383
|
July 27, 2021
|
|
SBA stand for ___
|
|
0
|
452
|
July 27, 2021
|
|
PA stand for ___
|
|
0
|
388
|
July 27, 2021
|
|
The pin configuration of 8086 is available in the ___
|
|
0
|
460
|
July 27, 2021
|
|
The physical address of memory is ___
|
|
0
|
485
|
July 27, 2021
|
|
How many type of addressing in memory ___
|
|
0
|
1181
|
July 27, 2021
|
|
Which register containing the 8086/8088 flag ___
|
|
0
|
686
|
July 27, 2021
|
|
Which has great important in modular programming ___
|
|
0
|
333
|
July 27, 2021
|
|
The lower 8 bit are called ___
|
|
0
|
288
|
July 27, 2021
|
|
In 8086 microprocessor the following has the highest priority among all ___
|
|
0
|
294
|
July 27, 2021
|
|
The external device is connected to a pin called the ___
|
|
0
|
1037
|
July 27, 2021
|
|
The standard I/O is also called ___
|
|
0
|
312
|
July 27, 2021
|
|
The microcomputer system by using the ___ device interface:
|
|
0
|
261
|
July 27, 2021
|
|
The ___ place the data from a register onto the data bus
|
|
0
|
367
|
July 27, 2021
|
|
DMA stands for ___
|
|
0
|
322
|
July 27, 2021
|
|
Which are the READ operation can in ___
|
|
0
|
414
|
July 27, 2021
|
|
MDR stands for ___
|
|
0
|
317
|
July 27, 2021
|
|
WE stands for ___
|
|
0
|
276
|
July 27, 2021
|
|
CS stands for ___
|
|
0
|
340
|
July 27, 2021
|
|
When memory write or I/O read are active data is from the ___
|
|
0
|
344
|
July 27, 2021
|
|
When memory read or I/O read are active data is to ___
|
|
0
|
272
|
July 27, 2021
|
|
Which bus transfer singles from the CPU to external device and others that carry singles from ___
|
|
0
|
303
|
July 27, 2021
|
|
CPU can read & write data by using ___
|
|
0
|
449
|
July 27, 2021
|
|
A 16 bit address bus can generate ___
|
|
0
|
425
|
July 27, 2021
|
|
Which bus carry addresses ___
|
|
0
|
360
|
July 27, 2021
|
|
_____ a subsystem that transfer data between computer components inside a computer
|
|
0
|
339
|
July 27, 2021
|